AU7P

Shelf time:
2023-12-28
Description:
AU7P

Product details description

FF300R12KT4


Features

● Supports AMD UltraScale+™ , AMD UltraScale™ , AMD Virtex™ 7 XT Gen3 (Endpoint), and 7 series 2.1 (Endpoint) Integrated Blocks for PCIe. 7A15T and 7A25T are not supported

● Support for 64, 128, 256, 512-bit datapath (64, and 128-bit datapath only for 7 series Gen2 IP)

● 64-bit source, destination, and descriptor addresses

● Up to four host-to-card (H2C/Read) data channels (up to two for 7 series Gen2 IP)

● Up to four card-to-host (C2H/Write) data channels (up to two for 7 series Gen2 IP)

● Selectable user interface

  -Single AXI4 memory mapped (MM) user interface

  -AXI4-Stream user interface (each channel has its own AXI4-Stream interface)

● AXI4 Master and AXI4-Lite Master optional interfaces allow for PCIe traffic to bypass the DMA engine

● AXI4-Lite Slave to access DMA status registers

● Scatter Gather descriptor list supporting unlimited list size

● 256 MB max transfer size per descriptor

● Legacy, MSI, and MSI-X interrupts

● Block fetches of contiguous descriptors

● Poll Mode

● Descriptor Bypass interface

● Arbitrary source and destination address

● Parity check or Propagate Parity on AXI bus (not available for 7 series Gen2 IP)


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